Google is collaborating with AMD to develop a product in the 10th generation TPU, marking AMD's first involvement in a custom AI ASIC project. Analysts point out that Google has nine generations of TPU development experience, and traditional TPU designs do not require AMD; the core of the collaboration lies in AMD's CPU IP, advanced packaging, and interconnect technology. The report mentions that Google and its customers are pushing for the integration of CPU cores within the TPU package to meet the demands of CPU-intensive workloads such as reinforcement learning. While traditional LLM training still relies primarily on accelerators, inference and agent-based models in reinforcement learning require more general computing resources. Recent hardware configurations from Google reflect this trend, with the TPU 8i system pairing one Google Axion CPU with every two TPUs, while the 7th generation TPU servers pair one Intel Xeon processor with every four TPUs. Reports suggest that a 1:1 ratio of CPUs to accelerators is optimal in certain scenarios, indicating that AI computing may increasingly rely on CPUs in the future. If the collaboration with AMD is successful, Google will combine its self-developed TPU accelerators with AMD's general computing cores to create hybrid AI ASICs, potentially reshaping the competitive landscape of data center chips.
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